TLV5610IDW中文资料

TLV5610IDW中文资料


2024年4月16日发(作者:平板和手机的区别)

元器件交易网

TLV5608

TLV5610

TLV5629

SLAS268E–MAY2000–REVISEDMARCH2004

8-CHANNEL,12-/10-/8-BIT,2.7-VTO5.5-VLOWPOWER

DIGITAL-TO-ANALOGCONVERTERWITHPOWERDOWN

FEATURES

•EightVoltageOutputDACsinOnePackage

–12-Bit

–10-Bit

–8-Bit

ProgrammableSettlingTimevsPower

Consumption

–1µsInFastMode

–3µsInSlowMode

CompatibleWithTMS320andSPI™Serial

Ports

MonotonicOverTemperature

LowPowerConsumption:

–18mWInSlowModeat3-V

–48mWInFastModeat3-V

ReferenceInputBuffers

Power-DownMode

Buffered,HighImpedanceReferenceInputs

DataOutputforDaisy-Chaining

APPLICATIONS

DigitalServoControlLoops

DigitalOffsetandGainAdjustment

IndustrialProcessControl

MachineandMotionControlDevices

MassStorageDevices

DW OR PW PACKAGE

(TOP VIEW)

DGND

DIN

SCLK

FS

PRE

OUTE

OUTF

OUTG

OUTH

AGND

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

DV

DD

DOUT

LDAC

MODE

REF

OUTD

OUTC

OUTB

OUTA

AV

DD

DESCRIPTION

TheTLV5610,TLV5608,andTLV5629arepin-compatible,eight-channel,12-/10-/8-bitvoltageoutputDACs

ialinterfaceallowsgluelessinterfacetoTMS320andSPI,QSPI,and

ogrammedwitha16-bitserialstringcontaining4controland12databits.

Additionalfeaturesareapower-downmode,anLDACinputforsimultaneousupdateofalleightDACoutputs,

andadataoutputwhichcanbeusedtocascademultipledevices.

Theresistorstringoutputvoltageisbufferedbyarail-to-railoutputamplifierwithaprogrammablesettlingtimeto

fered,high-impedancereferenceinputcanbe

connectedtothesupplyvoltage.

ImplementedwithaCMOSprocess,

devicesareavailablein20-pinSOICandTSSOPpackages.

AVAILABLEOPTIONS

T

A

PACKAGE

SMALLOUTLINE(DW)

TLV5610IDW

-40°Cto85°CTLV5608IDW

TLV5629IDW

TSSOP(PW)

TLV5610IPW

TLV5608IPW

TLV5629IPW

RESOLUTION

12

10

8

Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas

Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.

SPIisatrademarkofMotorola,Inc.

PRODUCTIONDATAinformationiscurrentasofpublicationdate.

ProductsconformtospecificationsperthetermsoftheTexas

tionprocessingdoesnot

necessarilyincludetestingofallparameters.

Copyright©2000–2004,TexasInstrumentsIncorporated

元器件交易网

TLV5608

TLV5610

TLV5629

SLAS268E–MAY2000–REVISEDMARCH2004

dsshouldbeshortedtogetherorthedeviceplacedinconductivefoam

duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates.

FUNCTIONALBLOCKDIAGRAM

REF

12/10/8

DAC A

Holding

Latch

SCLK

DIN

DOUT

FS

MODE

PRE

Serial

Interface

12

8

12/10/8

12/10/8

X2

DAC A

Latch

OUTA

DAC B, C, D, E, F, G and H

Same as DAC A

OUT

B, C, D,

E, F, G

and H

LDAC

TerminalFunctions

TERMINAL

NAME

AGND

AV

DD

DGND

DIN

DOUT

DV

DD

FS

LDAC

MODE

PRE

REF

SCLK

OUTA-OUTH

NO.

10

11

1

2

19

20

4

18

17

5

16

3

6-9,12-15

I/O

I

I

I

I

O

I

I

I

I

I

I

I

O

Analogground

Analogpowersupply

Digitalground

Digitalserialdatainput

Digitalserialdataoutput

Digitalpowersupply

Framesyncinput

outputsareonlyupdated,

asynchronousinput.

DSP/µ=µCmode,NC=DSPmode.

Presetinput

Voltagereferenceinput

Serialclockinput

DACoutputsA,B,C,D,E,F,GandH

DESCRIPTION

2


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