2024年2月21日发(作者：undergo)

LTC2261-14LTC2260-14/LTC2259-1414-Bit, 125/105/80Msps

Ultralow Power 1.8V ADCsFeaTures 73.4dB SNRn 85dB SFDRn Low Power: 127mW/106mW/89mWn Single 1.8V Supplyn CMOS, DDR CMOS or DDR LVDS Outputsn Selectable Input Ranges: 1VP-P to 2VP-P

n 800MHz Full-Power Bandwidth S/Hn Optional Data Output Randomizern Optional Clock Duty Cycle Stabilizern Shutdown and Nap Modesn Serial SPI Port for Configurationn Pin Compatible 14-Bit and 12-Bit Versionsn 40-Pin (6mm × 6mm) QFN PackagenDescripTionThe LTC®2261-14/LTC2260-14/LTC2259-14 are sam-pling 14-bit A/D converters designed for digitizing high

frequency, wide dynamic range signals. They are perfect

for demanding communications applications with AC

performance that includes 73.4dB SNR and 85dB spurious

free dynamic range (SFDR). Ultralow jitter of 0.17psRMS

allows undersampling of IF frequencies with excellent

noise specs include ±1LSB INL (typical), ±0.3LSB DNL (typi-cal) and no missing codes over temperature. The transition

noise is a low digital outputs can be either full-rate CMOS, double-data rate CMOS, or double-data rate LVDS. A separate

output power supply allows the CMOS output swing to

range from 1.2V to ENC+ and ENC– inputs may be driven differentially or

single ended with a sine wave, PECL, LVDS, TTL or CMOS

inputs. An optional clock duty cycle stabilizer allows high

performance at full speed for a wide range of clock duty

cycles.L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

applicaTions

n

n

n

n

n

nCommunicationsCellular Base StationsSoftware Defined RadiosPortable Medical ImagingMulti-Channel Data AcquisitionNondestructive TestingTypical applicaTion2-Tone FFT, fIN = 70MHz and 75MHz1.8VVDD1.2VTO 1.8VOVDDAMPLITUDE

(dBFS)0–10–20–30–40–50–60–70–80ANALOGINPUT+–INPUTS/H14-BITPIPELINEDADC CORECORRECTIONLOGICOUTPUTDRIVERSD13CMOS•OR•LVDS•D0OGNDCLOCK/DUTYCYCLECONTROL125MHzCLOCKGND226114 TA01a–90–100–110–12FREQUENCY (MHz)5060226114 TA01b226114fb/1

LTC2261-14LTC2260-14/LTC2259-14absoluTe MaxiMuM raTings(Notes 1, 2)Supply Voltages (VDD, OVDD) .......................–0.3V to 2VAnalog Input Voltage (AIN+, AIN–,

PAR/SER, SENSE) (Note 3) ..........–0.3V to (VDD + 0.2V)Digital Input Voltage (ENC+, ENC–, CS,SDI, SCK) (Note 4) ....................................–0.3V to 3.9VSDO (Note 4) .............................................–0.3V to 3.9VDigital Output Voltage ................–0.3V to (OVDD + 0.3V)Operating Temperature Range:

LTC2261C, LTC2260C, LTC2259C ............0°C to 70°C LTC2261I, LTC2260I, LTC2259I ...........–40°C to 85°CStorage Temperature Range ..................–65°C to 150°Cpin conFiguraTionsD12_13D10_11SENSEFULL-RATE CMOS OUTPUT MODETOP VIEWVREFDNCVCMD13D12D11D10VDDOFDOUBLE DATA RATE CMOS OUTPUT MODETOP VIEWSENSEVREFDNCDNCDNC30D8_929DNC28CLKOUT+27CLKOUT–41GND26OVDD25OGND24D6_723DNC22D4_521DNC617181920CSSCKSDISDODNCENC+ENC–D0_1DNCD2_3VCMVDDOF44333231AINAIN+–4433323130D929D828CLKOUT+27CLKOUT–AIN+1AIN–2GND3REFH4REFH5REFL6REFL7PAR/SER8VDD9VDD1012GND3REFH4REFH5REFL6REFL7PAR/SER8VDD9VDD1617181920ENC+ENC–CSSCKSDISDOD0D1D2D341GND26OVDD25OGND24D723D622D521D4UJ PACKAGE40-LEAD (6mm × 6mm) PLASTIC QFNTJMAX = 150°C, θJA = 32°C/W

EXPOSED PAD (PIN 41) IS GND, MUST BE SOLDERED TO PCB

UJ PACKAGE40-LEAD (6mm × 6mm) PLASTIC QFNTJMAX = 150°C, θJA = 32°C/W

EXPOSED PAD (PIN 41) IS GND, MUST BE SOLDERED TO PCB

DOUBLE DATA RATE LVDS OUTPUT MODETOP VIEWD12_13+D12_13–D10_11+D2_3–D10_11–30D8_9+29D8_9–28CLKOUT+27CLKOUT–41GND26OVDD25OGND24D6_7+23D6_7–22D4_5+21D4_5–617181920CSSCKENC+ENC–SDOSDID0_1–D0_1+D2_3+SENSEVREFVCMVDDOF+OF–44333231AIN+1AIN–2GND3REFH4REFH5REFL6REFL7PAR/SER8VDD9VDD10UJ PACKAGE40-LEAD (6mm × 6mm) PLASTIC QFNTJMAX = 150°C, θJA = 32°C/W

EXPOSED PAD (PIN 41) IS GND, MUST BE SOLDERED TO PCB

226114fb/2

LTC2261-14LTC2260-14/LTC2259-14orDer inForMaTionLEAD FREE FINISHLTC2261CUJ-14#PBFLTC2261IUJ-14#PBFLTC2260CUJ-14#PBFLTC2260IUJ-14#PBFLTC2259CUJ-14#PBFLTC2259IUJ-14#PBFTAPE AND REELLTC2261CUJ-14#TRPBFLTC2261IUJ-14#TRPBFLTC2260CUJ-14#TRPBFLTC2260IUJ-14#TRPBFLTC2259CUJ-14#TRPBFLTC2259IUJ-14#TRPBFPART MARKING*LTC2261UJ-14LTC2261UJ-14LTC2260UJ-14LTC2260UJ-14LTC2259UJ-14LTC2259UJ-14PACKAGE DESCRIPTION40-Lead (6mm × 6mm) Plastic QFN40-Lead (6mm × 6mm) Plastic QFN40-Lead (6mm × 6mm) Plastic QFN40-Lead (6mm × 6mm) Plastic QFN40-Lead (6mm × 6mm) Plastic QFN40-Lead (6mm × 6mm) Plastic QFNTEMPERATURE RANGE0°C to 70°C–40°C to 85°C0°C to 70°C–40°C to 85°C0°C to 70°C–40°C to 85°CConsult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping

container.

Consult LTC Marketing for information on non-standard lead based finish more information on lead free part marking, go to: /leadfree/

For more information on tape and reel specifications, go to: /tapeandreel/converTer characTerisTics The

l denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. (Note 5)CONDITIONSlPARAMETERResolution (No Missing Codes)Integral Linearity ErrorDifferential Linearity ErrorOffset ErrorGain ErrorOffset DriftFull-Scale DriftTransition NoiseLTC2261-14MINTYPMAX14±1±0.3±1.5±1.5

±0.4±20±30

±101.23.750.99

1.5–0.9–9

–1.5LTC2260-14MINTYPMAX14–3.75–0.9–9

–1.5±1±0.3±1.5±1.5

±0.4±20±30

±101.23.750.99

1.5LTC2259-14MINTYPMAX14–3.5–0.9–9

–1.5±1±0.3±1.5±1.5

±0.4±20±30

±101.23.50.99

1.5UNITSBitsLSBLSBmV%FS

%FSµV/°Cppm/°C

ppm/°CLSBRMSDifferential Analog Input (Note 6)l–3.75Differential Analog Input(Note 7)Internal Reference

External ReferenceInternal Reference

External ReferenceExternal Referencell

l226114fb/3

LTC2261-14LTC2260-14/LTC2259-14analog inpuT

SYMBOLPARAMETERVINVIN(CM)VSENSEIINCMIIN1IIN2IIN3tAPtJITTERCMRRBW-3BAnalog Input Range (AIN+ – AIN–)Analog Input Common Mode (AIN+ + AIN–)/2Analog Input Common Mode CurrentThe

l denotes the specifications which apply over the full operating temperature range, otherwise

specifications are at TA = 25°C. (Note 5)CONDITIONS1.7V < VDD < 1.9VDifferential Analog Input (Note 8)Per Pin, 125Msps

Per Pin, 105Msps

Per Pin, 80Msps0 < AIN+, AIN– < VDD, No Encode

0 < PAR/SER < VDD0.625 < SENSE < 1.3VllllllMINVCM – 100mV0.625TYP1 to 2VCM1.250155

130

100MAXVCM + 100mV1.300UNITSVP-PVVµA

µA

µAExternal Voltage Reference Applied to SENSEExternal Reference ModeAnalog Input Leakage CurrentPAR/SER Input Leakage CurrentSENSE Input Leakage CurrentSample-and-Hold Acquisition Delay TimeSample-and-Hold Acquisition Delay JitterAnalog Input Common Mode Rejection RatioFull-Power Bandwidth–1–3–600.1780136µAµAµAnspsRMSdBMHzFigure 6 Test Circuit800 The

l denotes the specifications which apply over the full operating temperature range,

otherwise specifications are at TA = 25°C. AIN = –1dBFS. (Note 5)SYMBOLSNRPARAMETERSignal-to-Noise RatioCONDITIONS5MHz Input

70MHz Input

140MHz Input

l

l

l

lDynaMic accuracyLTC2261-14MINTYPMAX

71.3

76

85

70.273.4

73.2

72.788

85

8290

90

9073

72.6

72LTC2260-14MINTYPMAX

71.3

76

83

70.273.4

73.2

72.788

85

8290

90

9073

72.6

72LTC2259-14MINTYPMAX

70.9

79

85

70.473.1

72.9

72.488

85

8290

90

9072.9

72.6

72UNITSdB

dB

dBdB

dB

dBdB

dB

dBdB

dB

dBSFDRSpurious Free Dynamic Range 5MHz Input

2nd or 3rd Harmonic70MHz Input

140MHz InputSpurious Free Dynamic Range 5MHz Input

4th Harmonic or Higher70MHz Input

140MHz InputS/(N+D)Signal-to-Noise Plus

Distortion Ratio5MHz Input

70MHz Input

140MHz InputinTernal reFerence characTerisTics

PARAMETERVCM Output VoltageVCM Output Temperature DriftVCM Output ResistanceVREF Output VoltageVREF Output Temperature DriftVREF Output ResistanceVREF Line Regulation–400µA < IOUT < 1mA1.7V < VDD < 1.9V–600µA < IOUT < 1mAIOUT = 0CONDITIONSIOUT = 0The

l denotes the specifications which apply over the

full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5)MIN0.5 • VDD – 25mVTYP0.5 • VDD±2541.2251.250±2570.61.275MAX0.5 • VDD + 25mVUNITSVppm/°CΩVppm/°CΩmV/V226114fb/4

LTC2261-14LTC2260-14/LTC2259-14DigiTal inpuTs anD ouTpuTs

SYMBOLPARAMETERENCODE INPUTS (ENC+, ENC–

)Differential Encode Mode (ENC– Not Tied to GND)VIDVICMVINRINCINVIHVILVINRINCINVIHVILIINCINROLIOHCOUTDifferential Input VoltageCommon Mode Input VoltageInput Voltage RangeInput ResistanceInput CapacitanceHigh Level Input VoltageLow Level Input VoltageInput Voltage RangeInput ResistanceInput CapacitanceHigh Level Input VoltageLow Level Input VoltageInput CurrentInput CapacitanceLogic Low Output Resistance to GNDLogic High Output Leakage CurrentOutput Capacitance(Note 8)Internally Set

Externally Set (Note 8)ENC+, ENC– to GND(See Figure 10)(Note 8)VDD = 1.8VVDD = 1.8VENC+ to GND(See Figure 11)(Note 8)VDD = 1.8VVDD = 1.8VVIN = 0V to 3.6V(Note 8)VDD = 1.8V, SDO = 0VSDO = 0V to 3.6V(Note 8)llllllll

llThe

l denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. (Note 5)CONDITIONSMINTYPMAXUNITS0.2

1.10.2103.51.20.60303.51.30.6–103200–10410103.61.2

1.63.6VV

VVkΩpFVVVkΩpFVVµApFΩµApFSingle-Ended Encode Mode (ENC– Tied to GND)DIGITAL INPUTS (CS, SDI, SCK)SDO OUTPUT (Open-Drain Output. Requires 2k Pull-Up Resistor if SDO is Used)DIGITAL DATA OUTPUTS (CMOS MODES: FULL DATA RATE AND DOUBLE-DATA RATE)OVDD = 1.8VVOHVOLVOHVOLVOHVOLVODVOSRTERMHigh Level Output VoltageLow Level Output VoltageHigh Level Output VoltageLow Level Output VoltageHigh Level Output VoltageLow Level Output VoltageDifferential Output VoltageCommon Mode Output VoltageOn-Chip Termination ResistanceIO = –500µAIO = 500µAIO = –500µAIO = 500µAIO = –500µAIO = 500µA100Ω Differential Load, 3.5mA Mode

100Ω Differential Load, 1.75mA Mode100Ω Differential Load, 3.5mA Mode

100Ω Differential Load, 1.75mA ModeTermination Enabled, OVDD = 1.8Vllll1.7501.7900.0101.4880.0101.1850.0100.050VVVVVV4541.375mV

mVV

VΩOVDD = 1.5VOVDD = 1.2VDIGITAL DATA OUTPUTS (LVDS MODE)2471.125350

1751.250

1.25fb/5

LTC2261-14LTC2260-14/LTC2259-14power requireMenTs

SYMBOLPARAMETERVDDOVDDIVDDIOVDDPDISSAnalog Supply VoltageOutput Supply VoltageAnalog Supply CurrentDigital Supply CurrentPower DissipationCONDITIONS(Note 10)(Note 10)DC Input

Sine Wave InputSine Wave Input, OVDD=1.2VlDC Input

Sine Wave Input, OVDD=1.2VlllThe

l denotes the specifications which apply over the full operating temperature

range, otherwise specifications are at TA = 25°C. (Note 9)LTC2261-14MINTYPMAX1.71.170.5

71.83.9127

1341.71.775.420.7

40.5173

2090.59101.81501.81.91.983.2

LTC2260-14MINTYPMAX1.71.158.6

59.83.3106

1121.71.763.420.7

40.5151

1870.59101.81251.81.91.969.1

LTC2259-14MINTYPMAX1.71.149.2

50.22.589

931.71.753.820.7

40.5134

1700.59101.81051.81.91.958.1

UNITSVVmA

mAmAmW

mWVVmAmA

mAmW

mWmWmWmWCMOS Output Modes: Full Data Rate and Double-Data RateLVDS Output ModeVDDOVDDIVDDIOVDDPDISSAnalog Supply VoltageOutput Supply VoltageAnalog Supply CurrentDigital Supply Current

(0VDD = 1.8V)Power Dissipation(Note 10)(Note 10)Sine Wave InputSine Input, 1.75mA Mode

Sine Input, 3.5mA ModeSine Input, 1.75mA Mode

Sine Input, 3.5mA Modellll

ll

l1.91.98926

47.8207

2461.91.974.826

47.8182

2211.91.963.526

47.8161

201All Output ModesPSLEEPPNAPPDIFFCLKSleep Mode PowerNap Mode PowerPower Increase with Differential Encode Mode Enabled

(No increase for Nap or Sleep Modes)TiMing characTerisTics

SYMBOLfStLtHtAPPARAMETERSampling FrequencyENC Low Time (Note 8)ENC High Time (Note 8)Sample-and-Hold

Acquisition Delay TimePARAMETERENC to Data DelayENC to CLKOUT DelayDATA to CLKOUT SkewPipeline LatencyCONDITIONS(Note 10)The

l denotes the specifications which apply over the full operating temperature

range, otherwise specifications are at TA = 25°C. (Note 5)LTC2261-14MINTYPMAXll

ll

lLTC2260-14MINTYPMAX14.52

2.004.52

2.004.76

4.764.76

4.760105500

500500

500LTC2259-14MINTYPMAX15.93

2.005.93

2.006.25

6.256.25

6.25080500

500500

500UNITSMHzns

nsns

nsns13.8

2.03.8

2.04

44

40125500

500500

500Duty Cycle Stabilizer Off

Duty Cycle Stabilizer OnDuty Cycle Stabilizer Off

Duty Cycle Stabilizer OnSYMBOLtDtCtSKEWCONDITIONSCL = 5pF (Note 8)CL = 5pF (Note 8)tD – tC (Note 8)Full Data Rate Mode

Double-Data Rate ModelllMIN1.110TYP1.71.40.35.0

5.5MAX3.12.60.6UNITSnsnsnsCycles

CyclesDigital Data Outputs (CMOS Modes: Full Data Rate and Double-Data Rate)226114fb/6

LTC2261-14LTC2260-14/LTC2259-14TiMing characTerisTics

SYMBOLtDtCtSKEWPARAMETERENC to Data DelayENC to CLKOUT DelayDATA to CLKOUT SkewPipeline LatencySPI Port Timing (Note 8)tSCKtStHtDStDHtDOSCK PeriodCS to SCK Setup TimeSCK to CS Setup TimeSDI Setup TimeSDI Hold TimeSCK Falling to SDO ValidReadback Mode, CSDO = 20pF, RPULLUP = 2kWrite Mode

Readback Mode, CSDO = 20pF, RPULLUP = 2kl

llllllThe

l denotes the specifications which apply over the full operating temperature

range, otherwise specifications are at TA = 25°C. (Note 5)CONDITIONSCL = 5pF (Note 8)CL = 5pF (Note 8)tD – tC (Note 8)lllMIN1.110TYP1.81.50.35.5MAX3.22.70.6UNITSnsnsnsCyclesns

nsnsnsnsnsDigital Data Outputs (LVDS Mode)40

2505555125nsNote 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and 2: All voltage values are with respect to GND with GND and OGND

shorted (unless otherwise noted).Note 3: When these pin voltages are taken below GND or above VDD, they

will be clamped by internal diodes. This product can handle input currents

of greater than 100mA below GND or above VDD without 4: When these pin voltages are taken below GND they will be

clamped by internal diodes. When these pin voltages are taken above VDD

they will not be clamped by internal diodes. This product can handle input

currents of greater than 100mA below GND without 5: VDD = OVDD = 1.8V, fSAMPLE = 125MHz (LTC2261),

105MHz (LTC2260), or 80MHz (LTC2259), LVDS outputs with internal

termination disabled, differential ENC+/ENC– = 2VP-P sine wave, input

range = 2VP-P with differential drive, unless otherwise 6: Integral nonlinearity is defined as the deviation of a code from a

best fit straight line to the transfer curve. The deviation is measured from

the center of the quantization 7: Offset error is the offset voltage measured from –0.5 LSB when

the output code flickers between 00 0000 0000 0000 and 11 1111 1111

1111 in 2’s complement output 8: Guaranteed by design, not subject to 9: VDD = 1.8V, fSAMPLE

= 125MHz (LTC2261), 105MHz (LTC2260),

or 80MHz (LTC2259), ENC+ = single-ended 1.8V square wave, ENC– = 0V,

input range = 2VP-P with differential drive, 5pF load on each digital output

unless otherwise 10: Recommended operating DiagraMsFull-Rate CMOS Output Mode Timing

All Outputs Are Single Ended and Have CMOS LevelstAPANALOGINPUTNtHN + 1N + 2N + 3tLN + 4ENC–ENC+tDD0-D13, OFCLKOUT+CLKOUT–tCN – 5N – 4N – 3N – 2N – 1226114 TD01226114fb/7

LTC2261-14LTC2260-14/LTC2259-14TiMing DiagraMs Double-Data Rate CMOS Output Mode Timing

All Outputs Are Single Ended and Have CMOS LevelstAPANALOGINPUTNtHENC–ENC+tDD0_1D0N-5D1N-5D0N-4tDD1N-4D0N-3D1N-3D0N-2D1N-2N + 1N + 2N + 3tLN + 4•••D12_13D12N-5D13N-5D12N-4D13N-4D12N-3D13N-3D12N-2D13N-2OF+OFN-5tCOFN-4tCOFN-3OFN-2CLKOUTCLKOUT–226114 TD02 Double-Data Rate LVDS Output Mode Timing

All Outputs Are Differential and Have LVDS LevelstAPANALOGINPUTNtHENC–ENC+D0_1+D0_1–D12_13+D12_13–OF+OF–CLKOUT+CLKOUT–D12N-5D13N-5D12N-4D13N-4D12N-3D13N-3D12N-2D13N-2tDD0N-5D1N-5D0N-4tDD1N-4D0N-3D1N-3D0N-2D1N-2N + 1N + 2N + 3tLN + 4•••OFN-5tCOFN-4tCOFN-3OFN-3226114 TD03226114fb/8

LTC2261-14LTC2260-14/LTC2259-14TiMing DiagraMsSPI Port Timing (Readback Mode)tSCSSCKtDOSDISDOR/WA6A5A4A3A2A1A0XXD7XXD6XXD5XXD4XXD3XXD2XXD1XXD0tDStDHtSCKtHHIGH IMPEDANCESPI Port Timing (Write Mode)CSSCKSDISDOR/WA6A5A4A3A2A1A0D7D6D5D4D3D2D1D0HIGH IMPEDANCE226114 TD04Typical perForMance characTerisTicsLTC2261-14: Integral

Non-Linearity (INL)2.01.51.0DNL

ERROR

(LSB)INL

ERROR

(LSB)0.50–0.5–1.0–1.5–2.288OUTPUT CODE G01LTC2261-14: Differential

Non-Linearity (DNL)1.00.80.6AMPLITUDE

(dBFS)0.40.20–0.2–0.4–0.6–0.8–1.288OUTPUT CODE G02LTC2261-14: 8k Point FFT, fIN = 5MHz

–1dBFS, 125Msps0–10–20–30–40–50–60–70–80–90–100–110–12FREQUENCY (MHz)5060226114 G03226114fb/9

LTC2261-14LTC2260-14/LTC2259-14Typical perForMance characTerisTicsLTC2261-14: 8k Point FFT, fIN = 30MHz

–1dBFS, 125Msps0–10–20AMPLITUDE

(dBFS)–30AMPLITUDE

(dBFS)–40–50–60–70–800–10–20–30–40–50–60–70–80AMPLITUDE

(dBFS)0203040FREQUENCY (MHz)5060226114 G05LTC2261-14: 8k Point FFT, fIN = 70MHz

–1dBFS, 125Msps0–10–20–30–40–50–60–70–80LTC2261-14: 8k Point FFT, fIN = 140MHz

–1dBFS, 125Msps–90–100–110–120–90–100–110–120–90–100–110–12FREQUENCY (MHz)5060226114 G0FREQUENCY (MHz)5060226114 G06LTC2261-14: 8k Point 2-Tone FFT,

fIN = 70MHz, 75MHz, –1dBFS,

125Msps0–10–20–30AMPLITUDE

(dBFS)–40–50–60–70–80LTC2261-14: Shorted Input

Histogram747372SNR

(dBFS)71828184OUTPUT CODE8186226114 G08LTC2261-14: SNR vs Input

Frequency, –1dB, 2V Range,

125Msps–90–100–110–120COUNT33040FREQUENCY (MHz)5060226114 GINPUT FREQUENCY (MHz)350LTC2261-14: SFDR vs Input

Frequency, –1dB, 2V Range,

125Msps959SFDR

(dBc

AND

dBFS)1140INPUT FREQUENCY (MHz)35070226114 G09LTC2261-14: SFDR vs Input Level,

fIN = 70MHz, 2V Range, 125MspsdBFS807570IVDD

(mA)dBc65LTC2261-14: IVDD vs Sample Rate,

5MHz Sine Wave Input, –1dBLVDS OUTPUTSSFDR

(dBFS)CMOS OUTPUTS6055500–80–70–60–50–40–30–20–10INPUT LEVEL (dBFS)SAMPLE RATE (Msps)125226114 G13226114 G10226114 G12226114fb/10

分销商库存信息:LINEAR-TECHNOLOGYLTC2261IUJ-14#PBFLTC2259CUJ-14#TRPBFLTC2259IUJ-14#PBFLTC2260IUJ-14#TRPBFDC1369A-ALTC2259CUJ-14#PBFLTC2259IUJ-14#TRPBFLTC2260CUJ-14#PBFLTC2261CUJ-14#PBFDC1369A-BLTC2260IUJ-14#PBFLTC2260CUJ-14#TRPBFLTC2261CUJ-14#TRPBFLTC2261IUJ-14#TRPBFDC1369A-C